/****************************************************************
========Oooo=========================================Oooo========
=     Copyright ©2015-2018 Gowin Semiconductor Corporation.     =
=                     All rights reserved.                      =
========Oooo=========================================Oooo========

<File Title>: IP file
<gwModGen version>: 1.8.0Beta
<Series, Device, Package, Speed>: GW1N, GW1N-4, LQFP144
<Created Time>: Wed Nov  7 16:29:24 2018
****************************************************************/

module GW_ROM (dout, clk, oce, ce, reset, wre, ad);

output [31:0] dout;
input clk;
input oce;
input ce;
input reset;
input wre;
input [4:0] ad;

wire gw_gnd;

assign gw_gnd = 1'b0;

ROM bram_rom_0 (
    .DO(dout[31:0]),
    .CLK(clk),
    .OCE(oce),
    .CE(ce),
    .RESET(reset),
    .WRE(wre),
    .BLKSEL({gw_gnd,gw_gnd,gw_gnd}),
    .AD({gw_gnd,gw_gnd,gw_gnd,gw_gnd,ad[4:0],gw_gnd,gw_gnd,gw_gnd,gw_gnd,gw_gnd})
);

defparam bram_rom_0.READ_MODE = 1'b0;
defparam bram_rom_0.BIT_WIDTH = 32;
defparam bram_rom_0.BLK_SEL = 3'b000;
defparam bram_rom_0.RESET_MODE = "SYNC";
defparam bram_rom_0.INIT_RAM_00 = 256'hFFFFF06FFFFFF06FFFFFF06FFFFFF06FFF9FF06F010020230018081300002803;
defparam bram_rom_0.INIT_RAM_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam bram_rom_0.INIT_RAM_02 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam bram_rom_0.INIT_RAM_03 = 256'hFFFFF06FFFFFF06F000000000000000000000000000000000000000000000000;

endmodule //GW_ROM
